Quote from: TonDaron on June 29, 2023, 18:23:58Preview processing, exporting was nearly as slow as on my i7 1060ti laptop from 3 years ago.
The 2020 i7 is nearly 3x+ slower than the 13980HX at its maximum performance profile. But everything rests on extremely slow memory controller, and this is critically important for Photoshop, etc. software.
The i7 2020 had a RAM speed of about 40Gbyte/s (if we compare classmates), and 13980HX one has 70-75Gb/s with DDR5600. Those. memory speed increased at best only 1.5 times, and latency, on the contrary, significantly worsened – i7 2020 by latency is faster.
Thus, a 3+ times increase in core performance compared to 2020 is not supported by a similar increase in RAM performance by 3+ times (including latency).
The Apple M2 Max 2022 has a memory controller 5 times faster than x86 controllers (but it's soldered memory, although available up to 96GB). That's where Photoshop can kick in, but there's a reduced set of Arm commands set that backfires, as does the need to emulate x86 software if necessary.
Unfortunately, there are no real changes in the performance of x86 memory controllers and are not expected in the near future, especially with the possibility of upgrading memory in 2-4 slots.
In order for Photoshop and similar software to work many times faster, it is necessary that not only the processor cores, but also the memory controller become 512 bits bus width, as in the Apple M2 Max, and not as it is now - shameful 128 bits on all x86.
I have already written many times anywhere - an obvious technological impasse x86 on the memory controller. That is why Intel/AMD are trying to increase the L2/L3 cache at times so that everything is not completely devastating in their camp, against the background of an increasing amount of memory.
At the same time, the same Intel builds tens of gigabytes of HBM memory directly into the Xeon Max processors. But this should have been in a regular consumer processor with many of the same cores for a long time...
I don't know what they will do next, but further increasing the number of cores and threads is completely pointless in such tasks without a cardinal increase in the memory controller bandwidth by an order of magnitude at once – from 500Gbyte/ s to 1Tbyte/s.