Quote from: dms on June 24, 2020, 23:33:51
Quote from: Valantar on June 19, 2020, 19:14:16
Quote from: dms on June 19, 2020, 11:18:15
Quote from: Valantar on June 18, 2020, 18:33:50
Also, I would assume this prototype laptop uses LPDDR4X (no reason they would cheap out for a prototype), while your Vega 7 benchmark is done with DDR4-3200, so I would assume a small further performance uptick for LPDDR4X Vega.
I would suspect it's the other way around because LPDDR memory has substantially lower bandwidth.
For example, DDR4-3600 has around twice the bandwidth of LPDDR4x-3733.
Per channel, yes, as LPDDR uses 32-bit (or even 16-bit for mobile) channels while DDR uses 64-bit channels. But both Ice Lake and Renoir, and likely also Tiger Lake, can run two LPDDR channels for each of their DDR channels (each controller can act as a single DDR channel or two "virtualized" LPDDR channels). So aggregate bandwidth for any properly configured LPDDR system is significantly higher than the same SoC with DDR due to the higher clocks.
Interesting, I didn't know that. Thanks for clarifying.
Not doubting you but is this well-known or do you have some kind of reference? Most comments I've seen (mainly on reddit tbh) seem to indicate that DDR >>> LPDDR in terms of bandwidth.
No problem :) I wouldn't call it common knowledge, and your misconception is indeed a common one. It's not that odd, given that in previous generations LPDDR has been slower both per channel
and in aggregate numbers, mainly as the clock speeds haven't been that high (LPDDR3 only hit 2133MT/s after DDR4 at similar or higher speeds had already been established as an industry standard). It's only with LPDDR4X and its very high clock speeds that LPDDR has properly taken the overall performance crown. Though we don't know how long that will hold as DDR5 is on its way (likely hitting desktops in 2021) - but then again so is LPDDR5, which already exists in a handful of high end phones.
As for the channel layout, AMD detailed it when Renoir was first presented, but I would assume that's the type of detail most publications would skip over as it gets too technical for broader audiences.
AnandTech covered it nicely in their launch coverage, and the following AMD slide pretty much sums up everything one needs to know:
(https://images.anandtech.com/doci/15624/2%20AMD%20Ryzen%20Mobile%20Tech%20Day_General%20Session_Architecture%20Deep%20Dive-page-022_575px.jpg)
(large version of the slide is linked in the AT article above.)
DDR4 still has two advantages: capacity (64GB or possibly 128 given dense DIMMs) and expandability (possibility of non-soldered memory), with LPDDR4X topping out at 32GB max and only existing in soldered form (the low voltages likely wouldn't work for a DIMM due to resistance in the contacts etc.).