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Posted by Redaktion
 - October 09, 2019, 15:44:33
The jump from 8-layer to 12-layer 3D TSV DRAM designs will enable AIB integrators to include as much as 96 GB of HBM2 DRAM on a single board, increasing the memory bus to 4,096-bit. The resulting increase in memory bandwidth will prove beneficial to AI, HPC and FPGA applications.

https://www.notebookcheck.net/Samsung-completes-development-of-12-layer-3D-TSV-DRAM-for-high-capacity-HBM2-modules.437612.0.html